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PHY algorithm design
OFDM, OFDMA, SC-FDMA, MIMO precoding, channel estimation, equalization, synchronization, and detection algorithms — designed for fixed-point hardware from day one.
Physical-layer DSP, modem firmware, and digital front-end design for next-generation wireless. Cellular, Wi-Fi, satellite, and proprietary radios — from algorithm specification to silicon-ready RTL.
Every wireless device has a baseband — the layer that turns clean digital bits into noisy analog signals and back again. It is the most demanding intersection of mathematics, electrical engineering, and chip design in the entire stack.
The bar set by Broadcom, Qualcomm, MediaTek, Intel, and AMD on this layer is uncompromising: real-time DSP at gigasamples per second, sub-dB link budget margins, conformance to thousand-page 3GPP and IEEE specs, and silicon area measured in fractions of a square millimeter.
We design at that bar. From the algorithm pseudocode in a research paper to fixed-point reference models, bit-true MATLAB, RTL, firmware, and lab bring-up — we cover the path that turns a wireless idea into something that ships.
OFDM, OFDMA, SC-FDMA, MIMO precoding, channel estimation, equalization, synchronization, and detection algorithms — designed for fixed-point hardware from day one.
LDPC, polar, Turbo, convolutional codes — encoder and decoder design, including layered min-sum, SCL, and parallel decoding architectures.
Up/downconversion, polyphase filters, CFR, DPD, AGC, DC offset compensation, and IQ imbalance correction. Built for power amplifier non-linearity and real RF impairments.
L1 control software, scheduler, MAC interfaces, AT-command parsers, and real-time DSP firmware on Hexagon, Tensilica, ARM, and custom DSP cores.
Bit-true reference models in MATLAB / Python with exhaustive corner coverage. Quantization analysis, SQNR budgets, and model-to-RTL parity verification.
SystemVerilog and VHDL implementation, UVM testbenches, formal property checks, and synthesis-aware microarchitecture for ASIC and FPGA targets.
3GPP NR Rel-15 through Rel-19, LTE-A, IEEE 802.11ax / be, DVB-S2X, and Bluetooth LE Audio. Test-vector generation, conformance suite execution, and IODT.
Spectrum analyzer, VSA, channel emulator, OTA chamber work — from first-light packet exchange to throughput-margin and sensitivity-floor characterization.
A practical, opinionated stack — chosen for production reliability, not novelty. We add to it carefully, and we share what we learn.
| Engagement model | Block-level or full-modem engagements, 12–52 weeksAlgorithm → fixed-point → RTL → bring-up |
|---|---|
| Typical deliverables | Reference model, RTL, UVM TB, integration packageConformance test reports included |
| Quality bar | Bit-true model parity, 100% functional coverage closureSynthesis-clean at target frequency |
| Hand-off & ownership | All RTL, models, scripts, and documentationOptional silicon bring-up support post-tape-out |
We work with a small number of partners each year. The right first step is usually a conversation. Or look at how we validate.
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